cystech electronics corp. spec. no. : c506j3 issued date : 2007.07.10 revised date :2013.06.19 page no. : 1/7 lm1117-xxxj3 cystek product specification 1a low dropout positive voltage regulator to-252 lm1117-xxxj3 adj/g o i features description adjustable or fixed output the lm1117 series of positive adjustable and fixed output current of 1a regulators are designed to provide 1a with high low dropout, 1.4v max at 1a output current efficiency. all internal circuitry is designed to good noise rejection operate down to 1.4v input to output differential. output current limiting the product is specifically designed to provide well- built-in thermal shutdown regulated suppl y for low-voltage ic application such fast transient response as high-speed bus termination and low current 3.3v can operate using mlccs in the capacitance range logic supply, and other applications such as vga cards. of 2 f to 10 f applications high efficiency linear regulators post regulators for switching supplies adjustable power supply typical application data fixed voltage regulator + + tab in gnd out c1 c2 vi n>4. 75v vout =3. 3v 10 f, t an. min 10 f, t an. 1)c1 needed if device is far from filter capacitors 2 ) c n otes: 3 1 2 2 minimum v alue re q uir ed for st abilit y adjustable voltage regulator + + tab in adj out r1 r2 c1 c2 vi n>4. 75v vout =3. 45v 10 f, t an. min 133 ? ,1% 232 ? , 1% 10 f, t an. vout=vref(1+r2/r1)+iadjr2 1)c1 needed if device is far from filter capacitors 2)c2 minimum value requir ed for st abilit y n otes: 3 1 2
cystech electronics corp. spec. no. : c506j3 issued date : 2007.07.10 revised date :2013.06.19 page no. : 2/7 lm1117-xxxj3 cystek product specification package information to-252 absolute maximum ratings symbol parameter maximum units p d power dissipation 1050 mw v in input voltage -0.3 ~ +15 v t opr operating junction temperature range -40 ~ +125 t stg storage temperature -65 ~ +150 t mj maximum junction temperature 150 device selection guide device output voltage package shipping lm1117-adjj3-0-t3-g adjustable lm1117-1.5j3-0-t3-g 1.5v lm1117-1.8j3-0-t3-g 1.8v lm1117-2.5j3-0-t3-g 2.5v lm1117-3.3j3-0-t3-g 3.3v lm1117-5.0j3-0-t3-g 5.0v to-252 (pb-free lead plating and halogen-free package) 2500 pcs / tape & reel block diagram pin name 1 adj/gnd 2 output 3 input
cystech electronics corp. spec. no. : c506j3 issued date : 2007.07.10 revised date :2013.06.19 page no. : 3/7 lm1117-xxxj3 cystek product specification electrical characteristics @ i o =10ma,t j =25 , unless otherwise specified paramete r device test conditions min t yp max units reference voltage adj version v in- v out =1.5v 1.225 1.250 1.275 v lm1117-1.5 3.0v v in 12v 1.470 1.500 1.530 v lm1117-1.8 3.3v v in 12v 1.764 1.800 1.836 v lm1117-2.5 4.0v v in 12v 2.450 2.500 2.550 v lm1117-3.3 4.8v v in 12v 3.235 3.300 3.365 v output voltage lm1117-5.0 6.5v v in 12v 4.900 5.000 5.100 v line regulation all version v out +1.5v v in 12v - - 0.2 % lm1117-adj v in =3.3v, vadj=0, 10ma i o 1a - - 1 % lm1117-1.5 v in =3.0v, 0ma i o 1a - 12 15 mv lm1117-1.8 v in =3.3v, 0ma i o 1a - 15 18 mv lm1117-2.5 v in =4.0v, 0ma i o 1a - 20 25 mv lm1117-3.3 v in =5.0v, 0ma i o 1a - 26 33 mv load regulation (note 1, 2) lm1117-5.0 v in =8.0v, 0ma i o 1a - 40 50 mv dropout voltage (v in -v out ) all version i o =1a ( v out =1%v out ) - 1.3 1.4 v current limit all version v in -v out =5v 1.1 - - a minimum load current adj version v in =5v - 5 10 ma adjust pin current adj version v in =12v, i o =10ma - 50 100 a quiescent current fixed version v in =12v, i o =0ma - - 12 ma thermal regulation all version t a =25 , 30ms pulse - 0.008 0.04 %/w ripple rejection all version f=120hz, v in =v out +3v, i o = 1a, c out =25 f tantalum 60 70 - db temperature stability all version i o = 10ma - 0.5 - % thermal resistance, junction to ambient( no heat sink, no air flow) all version - 117 - /w thermal resistance, junction to case all version control circuitry/ power transistor - 15 - /w note : 1.see thermal regulation specifications for changes in out put voltage due to heating effect s. line and load regulation are measured at a constant junction temperature by low duty cycle pulse testing. load regulation is measured at the output lead 1/18? from the package. 2. line and load regulation are guaranteed up to the maximum power dissipation of 15w. power dissipation is determ ined by the difference in input and output and the out put current. guaranteed maximum power dissipation will not be availa ble over the full input/output range.
cystech electronics corp. spec. no. : c506j3 issued date : 2007.07.10 revised date :2013.06.19 page no. : 4/7 lm1117-xxxj3 cystek product specification characteristic curves
cystech electronics corp. spec. no. : c506j3 issued date : 2007.07.10 revised date :2013.06.19 page no. : 5/7 lm1117-xxxj3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c506j3 issued date : 2007.07.10 revised date :2013.06.19 page no. : 6/7 lm1117-xxxj3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c506j3 issued date : 2007.07.10 revised date :2013.06.19 page no. : 7/7 lm1117-xxxj3 cystek product specification to-252 dimension marking: style: pin 1.vin 2.ground 3.vout 4.vin 3-lead to-252 plastic surface mount package cystek package code: j3 device name date code 1117 1 2 3 4 1.5v -15 1.8v -18 2.5v -25 3.3v -33 5.0v -50 adj blank inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.087 0.094 2.200 2.400 e 0. 086 0.094 2.186 2.386 a1 0.000 0.005 0.000 0.127 e1 0.172 0.188 4.372 4.772 b 0.039 0.048 0.990 1.210 h 0.163 ref 4.140 ref b 0.026 0.034 0.660 0.860 k 0.190 ref 4.830 ref b1 0.026 0.034 0.660 0.860 l 0. 386 0.409 9.800 10.400 c 0.018 0.023 0.460 0.580 l1 0.114 ref 2.900 ref c1 0.018 0.023 0.460 0.580 l2 0.055 0.067 1.400 1.700 d 0.256 0.264 6.500 6.700 l3 0. 024 0.039 0.600 1.000 d1 0.201 0.215 5.100 5.460 p 0.026 ref 0.650 ref e 0.236 0.244 6.000 6.200 v 0.211 ref 5.350 ref notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead : pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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